سال انتشار: ۱۳۸۴
محل انتشار: یازدهمین کنفرانس سالانه انجمن کامپیوتر ایران
تعداد صفحات: ۴
Ali Mahjur – Computer Engineering DepartmentSharif University of TechnologyTehran, Iran
Amir Hossein Jahangir –
Hardware prefetching schemes that divide misses into a number of streams, are preferred to other schemes. However, as they do not know when the next miss of a stream happens, they cannot effectively decide when to prefetch a block. Some of them use a substantial amount of storage to prefetch the predicted miss blocks of all streams and the others prefetch all target addresses, including those blocks that are already in the L1 data cache. This paper predicts the stream of the next miss and then prefetches only the next miss address of that stream. It offers a general prefetching framework, Two-Phase Prediction (TPP), that lets each stream have its own address predictor. Comparing TPP with stream buffers using SPEC CPU 2000 benchmarks shows that 1) TPP outperforms stream buffers in almost 90% of programs; in some programs, it is over 50% better than stream buffers. 2) Except one program, the rate of TPP useful prefetches is always better than that of stream buffers. In average, the rate of TPP useful prefetches is 5 times better than that of stream buffers.