سال انتشار: ۱۳۹۱

محل انتشار: پانزدهمین کنفرانس دانشجویی مهندسی برق ایران

تعداد صفحات: ۶

نویسنده(ها):

Mohsen Shahsavani – M.S Student of Dept.of Electrical Engineering,Boshehr ,Branch
Mohsen Maesoumi – Dept.of Electrical Engineering,Jahrom, Branch
Mostafa Esmailbeag – Dept.of Electrical Engineering,Boshehr, Branch,

چکیده:

A new CMOS four-quadrant analog multiplier is presented in this paper. The proposed multiplier is suitable for operation at lower voltages with low power consumption. The proposed multiplier circuit is simulated using software HSPICE by 0.35mm technology and simulation results show the feasibility of the proposed circuit function as an analog multiplier. Corresponding obtained results with the voltage of 1V, power consumption of the proposed circuit is only 19mw. The proposed multiplier circuit can be used as frequency doublers and this technique with a simpler structure and smaller components provides a 2 GHz bandwidth response