سال انتشار: ۱۳۹۰
محل انتشار: نوزدهمین کنفرانس مهندسی برق ایران
تعداد صفحات: ۵
Yasha Karimi – Student Member, IEEE
Adib Abrishamifar – Department of Electrical Engineering, Iran University of Science and Technology, Iran.
In this paper, we propose a configurable analogue block. The logarithmic and exponential cells are the basic elements in realization scheme. As transistors are operating in weak inversion mode, it can be efficiently employed in systems and applications demanding very low power especially on Field programmable analogue arrays. The block was simulated in 0.18μm CMOS process at supply, and some function examples are obtained by means of this block. For instance, the input range of logarithmic function is 0 to 500nA while its total power dissipation is 30nW, and its maximum error is 5%. The simulation results were obtained by Hspice and with high detailed transistor ability.